In the process of manufacturing semiconductor devices, a photolithography sequence is repeatedly performed to form patterns on a semiconductor wafer (which may be simply referred to as “wafer” hereinafter). The photolithography sequence comprises a resist coating process for forming a resist film on the surface of a semiconductor wafer, a light exposure process for performing light exposure by use of a light exposure mask on the wafer with the resist film formed thereon, and a developing process for performing development on the wafer after the light exposure. Further, a pre-light-exposure baking (PAB) process is performed before the light exposure process, and a post-light-exposure baking (post-exposure baking; PEB) process is performed after the light exposure process.
In semiconductor manufacturing processes, photolithography sequences are respectively performed by photolithography process sections connected to an AMHS (Automated Material Handling Systems) in the factory. Conventionally, due to process restrictions, each photolithography process section is arranged such that a resist coating/developing process apparatus and light exposure process apparatus are disposed in series as one unit, so that wafers W are transferred between this unit and the AMHS described above (for example, Jpn. Pat. Appln. KOKAI Publication No. 2000-124124 (paragraph 0027 and FIG. 2)). In a conventional apparatus having such layout, a plurality of wafers are transferred from the AMHS by use of cassettes, and are supplied onto the resist coating/developing process apparatus of each photolithography process section in units of a cassette. Then, the wafers W are taken out one by one from the cassette by a transfer mechanism of the resist coating/developing process apparatus, and are subjected to a series of processes, such as resist coating, light exposure, and development.
In recent years, along with improvements of technical nodes in semiconductor devices, i.e., progress of the miniaturization level of semiconductor devices, new techniques, such as double light exposure, have been developed. The double light exposure is arranged to process a wafer with a resist film formed thereon such that, for example, a light exposure process is first performed in accordance with a predetermined line width, and a second light exposure process is then performed with a different mask position in accordance with a smaller line width, so as to improve the resolution. However, the double light exposure technique literally comprises two light exposure processes, and thus doubles the time period necessary for the photolithography sequence by simple arithmetic. Accordingly, there is concern that the double light exposure technique significantly lowers the throughput in manufacturing semiconductor devices.